On Verification Engineers and VLSI
The microprocessors in a personal computer or a heavy
workstation, the chip in a mobile, digital camera or a camcorder- all of these
revolutionary items were a product of VLSI technology. VLSI stands for Very
Large-Scale Integration. Through this technology, integration of circuit
through the integration of millions of transistors into a chip has been
achieved. This is what helps in the creation of microprocessors and chips,
without which, our lives just won’t be the same as today.
If one is thinking of vlsi design verification
training or to become a vlsi design verification engineer, some pointers are mentioned below.
Learners of design verification often have to
understand the basics of front-end design constructs. Gain hands on experience
on basic ideas and topics as well. When the data flow is understood, proceed
with building a standard test environment. It is also advised to have previous knowledge
on digital design concepts as it is rather fundamental.
Keeping this mind, it should be noted that there are
many categories to verifications, namely, some are- IP verification, CPU
verification, SoC verification and Timing Verification.
Some more basic knowledge that is demanded is:
1.
Knowledge
on Verilog and its code – the RTL design.
2.
Knowledge
on System Verilog. This is an extended version of Verilog.
3.
For
many top and big-name semiconductor companies, the understanding of C is also
required.
4.
Know-hows
of the Amba protocol can also help greatly.
Many also say that spotting mistakes everywhere
possible, makes a good verification engineer and training one’s mind to spot
mistakes and assumptions can be very helpful in the field. Argumentative though
process is something upon which Verilog functions. This means to find out and
bust loop holes in working and sensible designs.
OOPS- Object Oriented Programming Concepts can also
help prepare for being a verification engineer in VLSI. It is also advised that
prospective participants also be prepared for general behavioural questions.
Previous knowledge on scripting languages such as PERL
or TCL may also prove useful along with knowing some basic commands for Linux.
Some recommend knowing and having sound knowledge on
CMOS fundamentals too.
With SoC verification, as writing Connectivity based
TestCases.Hard IP are also present, the skill sets are yet to be seen for this
one.
The job of a verification engineer is spread over many
levels such as the unit level, subsystem or system level, emulation, and post
silicon. Each level requires the carrying forth of certain instructions and
actions. Functional and formal verification are two types of verifications with
differences in state spaces. Formal verification has a verified whole state
space whereas functional verification has a random state space where not each
state is covered.
Verification Engineers, as the title itself suggests,
focus on bug testing, designing reference models and smart random input.
Overall, the above mentioned is a small insight to
both the field and the job. As established, to become a verification engineer,
certain basic knowledge is a must and if that is cleared and qualified, there
is nothing else standing in the way.
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